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alteralvds.rar
- 基于altera系列芯片lvds接口的fpga设计 verilog源码,Series altera-based chip interface lvds source fpga design verilog
LVDS_Serdes_list_FPGA1
- FPGA之间的LVDS传输,采用serdes接口,传输速率达到400m-LVDS transmission between the FPGA using serdes interface, transfer rate up to 400m